The present invention relates to high speed signaling for multi-drop or point-to-point buses and more specifically to a wireless alternative for sending high speed signals between components on a printed circuit board (PCB) or multi-chip module (MCM).
As data rates in computer systems continue to increase, traditional multi-drop buses such as the front side bus (FSB) used in Intel® Pentium 4™ systems begin to severely limit system speed. For example, the multi-drop FSB used in current Pentium 4 systems will not support data rates faster than approximately 800 gigabits per second.
Traditional multi-drop buses include stubs, or taps required to attach the multiple loads. These stubs cause impedance discontinuities, induce reflections, and can severely degrade the signal integrity.
FIG. 1 illustrates the topology of a traditional routed multi-drop FSB, where agents 102, 104, and 106 are processors within a multi-processor system and device 108 is a chipset, such as a North Bridge. The impedance of the channel (110), Zchannel is 50Ω and the impedance of a stub (112), Zstub is 50Ω. If agent 102 is driving, 33% of the energy is reflected at the first stub 112, which connects agent 104 to the main channel:Zin=Zchannel∥Zstub=25 ΩΓstub=[Zin−Zstub]/[Zin+Zstub]=−⅓
Subsequently, only ⅔ of the signal is transmitted to agent 106, which will have the same reflection coefficient as seen at agent 104. Additionally, the reflected signal will bounce back and forth on the bus, dramatically degrading the signal integrity.
Although some techniques may be used to minimize reflections at the stubs, physical and electrical constraints severely limit the effectiveness of such solutions at high data rates.